
Staff Design Verification Engineer
3 days ago
HR Business Partner - Talent Acquisition
Job Summary:
The Staff Design Verification (DV) Engineer is responsible for setting the verification policies, managing verification activities, preparing verification packages for clients and maintaining verification assets.
As a staff engineer, the role can also include involvement in research and development, process development, process improvement, resource planning, team development, project leading, and client communication.
Key Responsibilities:
- Establish and improve systems and processes related to design verification
- Verify digital designs up to system-level
- May verify analog-mixed signal blocks that interface to digital blocks
- Identify test cases and develop verification plans based on design specifications
- Develop testbenches and testbench components such as models, monitors and scoreboards
- Perform test implementation, simulation and debugging
- Design regression testing environments
- Perform regression testing, coverage collection and analysis
- Prepare verification packages for clients
- Collaborate with design team and other stakeholders to deliver on-time and high-quality design verification
- Review output of junior members of the team to ensure quality of design verification
- Develop and promote best practices for design verification
- Manage verification assets
- Provide support to customers
Key Qualifications:
- BS or MS in Electrical Engineering, Electronics Engineering, Computer Engineering or related courses
- With at least 10 years of digital or analog-mixed signal design verification work experience
Design Verification Process & Technology Domain:
- Expert in all phases of design verification - verification plan creation, testbench creation, test suite implementation, simulation & debugging, coverage collection & analysis, and regression testing
- Experience in analog-mixed signal verification is preferred
- Proficient in industry standard protocols such as AXI, AHB, PCIe, and I2C
- Expert in multiple technology domains such as sensors, video & image processing, security and SoC infrastructure (memory, I/O, bus controllers)
EDA Tools:
- Expert in using simulation tools such as VCS, Incisive/Xcelium, and Questa
Language & Methodology:
- Expert in HVL and methodologies (Verilog, SystemVerilog, UVM)
- Proficient in C/C++ or other high-level programming language
- Proficient in scripting such as Perl, shell scripting and Tcl
Nice to have:
- Ability to standardize and improve development processes
- Excellent communication and presentation skills, both written and spoken English
- Aggressive in learning, strong problem solving, decision-making and troubleshooting skills
- Ability to work in a team operating across multiple sites
- Ability to plan and organize project activities
- Ability to lead a design verification team
- Ability to coach junior engineers
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