IC Layout Engineer

6 days ago

Ayala Alabang, National Capital Region, Philippines Lattice Semiconductor Full time $60,000 - $120,000 per year

Lattice Overview
There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.

Accountabilities
Responsibilities & Skills

  • Execute floor plan, routing and physical verification of custom IPs (analog, mixed-signal and custom digital). Create IP layout documentations and provide support until sign-off.
  • Provide support to sector and full chip activities such as physical integration and physical verification.
  • Work effectively with circuit designers to understand key layout constraints.
  • Proactively collaborate with EDA CAD group as issues arise.
  • Hold layout quality reviews of completed cells, macros and chip-level layout.
  • Recognize layout considerations pertaining to device matching, noise, shielding, and latch-up in analog, mixed signal and digital circuit.
  • Run and analyze parasitic extractions.

Required Skills

  • At least 2 yrs of solid Custom Layout Engineering industry experience.
  • Custom layout of IP blocks to full chip layout integration using Cadence Virtuoso and full physical verification (DRC, LVS, ESD, Antenna, DFM, EM-IR, PERC, etc) using Siemens Calibre.
  • Experience in running, analyzing and debugging EM-IR using Cadence Voltus.
  • Experience in generating LPE is preferred.
  • Automation skill is a plus (e.g. Cadence SKILL scripting).
  • FinFET technology node experience is a plus.
  • PNR experience is a plus.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA , CPLD and programmable power management devices help our customers unlock their innovation, visit . You can also follow us via Twitter , Facebook , or RSS . At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

Lattice

Feel the energy.

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