Semiconductor Integration Design Engineer

3 days ago

Taguig, National Capital Region, Philippines Lattice Semiconductor Full time
Company Overview

Lattice Semiconductor is a leading provider of programmable logic solutions. Our worldwide community of engineers, designers, and manufacturing operations specialists work in partnership with world-class sales, marketing, and support teams to develop cutting-edge technologies.


Job Description

The position of Integration Design Engineer at Lattice Semiconductor involves designing and implementing custom and digital density-specific IPs, sectors, and fullchips using various design flows. The successful candidate will work closely with other functional teams to debug and resolve issues.

Responsibilities:

  • Design and implement custom and digital density-specific IPs and sectors suitable for fullchip integration.
  • Collaborate with Architecture, SW, IP Design, and Physical Design Teams to generate fullchip logical floorplan.
  • Generate fullchip behavioral model by integrating the various IP models in alignment to the logical floorplan and the requirements of SW and Verification teams.
  • Work closely with other functional teams to debug and resolve issues.
  • Perform fullchip tapeout-gating audits such as Electromigration and IR drop (EMIR) Analysis, Netlist Electrical Rule Checks (NetERC), Power Distribution Network (PDN) Extraction, Simultaneously Switching Outputs (SSO) simulations, and ESD checks.

Required Skills and Qualifications

To be successful in this role, you will need to have a strong background in electronics, computer, or electrical engineering. You should have at least 8 years of proven experience in custom and digital design implementation and expertise in Verilog and System Verilog.

Key Skills:

  • Expertise in Custom Design Flow and semiconductor principles and transistor-level analysis.
  • Industry standard tools for schematic and layout Entry (Cadence Virtuoso).
  • Characterization, performance, and power simulations (spice is preferred).
  • Digital Design Flow including RTL coding and verification, lint check, elaboration/compilation, synthesis, equivalence check, SDC, and STA using industry standard tools (Xcelium, Genus, Innovus, Tempus).
  • Coding/scripting skills (Perl, TCL, Shell, Skill, Python).

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