Senior SoC Design Engineer
5 days ago
Who we are : Persimmons is building the infrastructure that will power the next decade of AI. Founded in 2023 by veteran technologists from the worlds of semiconductors, AI systems, and software innovation, We’re on a mission to enable smarter devices, more sustainable data centers, and entirely new applications the world hasn’t imagined yet. Why join us: We’re growing fast and looking for bold thinkers, builders, and curious problem-solvers who want to push the limits of AI hardware and software. If you're ready to join a world-class team and play a critical role in making a global impact - we want to talk to you. What you’ll do: As a Senior SoC Design Engineer, you will be responsible for building and verifying the Persimmons SoC that will run the smallest to largest AI models. Your primary duties and responsibilities include: Integrate multiple IP blocks and subsystems into complete System-on-Chip (SoC) designs, ensuring proper connectivity and signal routing between components Develop and maintain top-level RTL integration structure, including clock and reset, DFT, power management and system-level connectivity Collaborate with IP design teams to integrate in-house, commercial & open source IP into the SoC efficiently. Create and execute comprehensive integration test plans, including working closely with DV engineers to close on verification plan and coverage. Develop and maintain integration scripts and automation tools to streamline the SoC assembly process and reduce manual integration overhead Generate comprehensive integration documentation, including design specifications, integration guidelines, and verification reports. Collaborate with Physical design teams to ensure integration decisions support successful place-and-route implementation and timing closure. What You Bring To The Table: Bachelor's/Master's degree in Electrical/Computer Engineering, or a related field. 7+ years of hands-on experience in digital design using Verilog or SystemVerilog Previous experience integrating complex SoCs with open source IP of variable quality, processor cores, fabric IP (AXI, AHB), memory controllers, & high-speed interfaces. Experience designing & integration infrastructure blocks e.g. clock, reset, DFT, monitors, power management. Experience with scripting languages such as Python, Perl, or Tcl for automation. Proficiency with industry-standard EDA tools including simulation environments (ModelSim, VCS, Xcelium) and synthesis tools Excellent problem-solving, communication, analytical skills & with the ability to debug complex multi-block integration issues Benefits: Competitive salary and benefits package Flexible PTO 401k Please note : Our organization does not accept unsolicited candidate submissions from external recruiters or agencies. Any such submissions, regardless of form (including but not limited to email, direct messaging, or social media), shall be deemed voluntary and shall not create any express or implied obligation on the part of the organization to pay any fees, commissions, or other compensation. Direct contact of employees, officers, or board members regarding employment opportunities is strictly prohibited and will not receive a response. #J-18808-Ljbffr
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